* find that multiprocessor extensions are
* present and the system is SMP */
mrc CP32(r1, MPIDR)
- tst r1, #(1<<31) /* Multiprocessor extension supported? */
+ tst r1, #MPIDR_SMP /* Multiprocessor extension supported? */
beq 1f
- tst r1, #(1<<30) /* Uniprocessor system? */
+ tst r1, #MPIDR_UP /* Uniprocessor system? */
bne 1f
bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */
1:
* find that multiprocessor extensions are
* present and the system is SMP */
mrs x0, mpidr_el1
- tbz x0, 31, 1f /* Multiprocessor extension not supported? */
- tbnz x0, 30, 1f /* Uniprocessor system? */
+ tbz x0, _MPIDR_SMP, 1f /* Multiprocessor extension not supported? */
+ tbnz x0, _MPIDR_UP, 1f /* Uniprocessor system? */
- mov x13, #(0xff << 24)
+ mov x13, #(~MPIDR_HWID_MASK)
bic x24, x0, x13 /* Mask out flags to get CPU ID */
1:
#define MIDR_MASK 0xff0ffff0
/* MPIDR Multiprocessor Affinity Register */
-#define MPIDR_UP (1 << 30)
-#define MPIDR_SMP (1 << 31)
+#define _MPIDR_UP (30)
+#define MPIDR_UP (_AC(1,U) << _MPIDR_UP)
+#define _MPIDR_SMP (31)
+#define MPIDR_SMP (_AC(1,U) << _MPIDR_SMP)
#define MPIDR_AFF0_SHIFT (0)
-#define MPIDR_AFF0_MASK (0xff << MPIDR_AFF0_SHIFT)
-#define MPIDR_HWID_MASK 0xffffff
+#define MPIDR_AFF0_MASK (_AC(0xff,U) << MPIDR_AFF0_SHIFT)
+#define MPIDR_HWID_MASK _AC(0xffffff,U)
#define MPIDR_INVALID (~MPIDR_HWID_MASK)
/* TTBCR Translation Table Base Control Register */